2024, Vol. 4, Issue 1, Part A
Investigating innovative design methods for low-power VLSI in IoT devices
Author(s): Samo Velikonja and Nevenka Kregar Roškar
Abstract: The proliferation of Internet of Things (IoT) devices in modern technology ecosystems has necessitated the development of low-power, high-efficiency Very Large Scale Integration (VLSI) circuits. This paper explores innovative design methodologies aimed at reducing power consumption in VLSI circuits, which are crucial for the sustainability and performance of IoT devices. By examining various low-power design techniques, such as power gating, multi-threshold CMOS (MTCMOS), and dynamic voltage frequency scaling (DVFS), we propose a comprehensive approach to designing energy-efficient VLSI circuits for the next generation of IoT applications.
Pages: 24-27 | Views: 37 | Downloads: 15
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How to cite this article:
Samo Velikonja, Nevenka Kregar Roškar. Investigating innovative design methods for low-power VLSI in IoT devices. Int J Electron Microcircuits 2024;4(1):24-27.
