2024, Vol. 4, Issue 2, Part A
Performance analysis of neural network accelerators in microcircuit design using Tensorflow and Xilinx Vivado
Author(s): Kombe Mbale
Abstract: Neural network accelerators have become essential in addressing the growing computational demands of AI and machine learning applications. This study evaluates the performance of neural network accelerators implemented on FPGA and ASIC platforms, utilizing TensorFlow for neural network model design and Xilinx Vivado for FPGA hardware prototyping. Benchmark tests were conducted using CNNs, RNNs, and Transformer models on datasets such as CIFAR-10, ImageNet, and Penn Treebank (PTB). Key performance metrics, including latency, power consumption, throughput, and accuracy, were analyzed. Results revealed that ASIC outperformed FPGA across all metrics, with 40% lower latency, 46.7% reduced power consumption, and 33% higher throughput, while maintaining a slightly higher accuracy (94% vs. 92%). The discussion highlighted ASIC's suitability for real-time, power-efficient AI tasks, whereas FPGA remains advantageous for prototyping and adaptable AI architectures. In conclusion, ASIC excels in performance and efficiency, making it ideal for deployment in resource-constrained AI applications, while FPGA serves as a flexible platform for iterative design and experimentation. These findings provide valuable insights for selecting hardware platforms based on application-specific requirements in neural network microcircuit design.
DOI: 10.22271/27084493.2024.v4.i2a.59
Pages: 62-67 | Views: 50 | Downloads: 28
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How to cite this article:
Kombe Mbale. Performance analysis of neural network accelerators in microcircuit design using Tensorflow and Xilinx Vivado. Int J Electron Microcircuits 2024;4(2):62-67. DOI: 10.22271/27084493.2024.v4.i2a.59
